How to modify the external crystal frequency and configure PLL for stm32duino?
How to modify the external crystal frequency and configure PLL for stm32duino?
Hi, my Arduino IDE has stm32duino installed. I want to use the board of STM32F407, but I know that some boards use external crystal 25MHz and some use 8MHz. So if I want to configure the clock properly, where should I configure the PLL parameters?
Re: How to modify the external crystal frequency and configure PLL for stm32duino?
you need to define your own
in your variant, you can look at examples from existing variants e.g.
https://github.com/stm32duino/Arduino_C ... I.cpp#L148
system clock and the peripheral clocks are linked, but that if you keep it to the standard published system clocks,
it is tuning the pll multipliers / dividers PLLM, PLLN, PLLP, PLLQ - this is for the stm32f4xx series.
other series may differ.
there is also a python script here, that you can use to explore the PLL configs.
viewtopic.php?t=78
Code: Select all
void SystemClock_Config(void)
https://github.com/stm32duino/Arduino_C ... I.cpp#L148
Code: Select all
WEAK void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
/**Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 25;
RCC_OscInitStruct.PLL.PLLN = 336;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 7;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Error_Handler();
}
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
Error_Handler();
}
/* Ensure CCM RAM clock is enabled */
__HAL_RCC_CCMDATARAMEN_CLK_ENABLE();
}
it is tuning the pll multipliers / dividers PLLM, PLLN, PLLP, PLLQ - this is for the stm32f4xx series.
other series may differ.
there is also a python script here, that you can use to explore the PLL configs.
viewtopic.php?t=78