[STM32GENERIC] FSMC - SRAM

Discussions about the STM32generic core
stevestrong
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Re: [STM32GENERIC] FSMC - SRAM

Post by stevestrong » Tue Jun 06, 2017 8:33 am

For libmaple (Arduino_STM32 based) core I have implemented FSMC for LCD 16 bit parallel access, as described here.
Check here the benchmark.

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Zingg_JM
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Re: [STM32GENERIC] FSMC - SRAM

Post by Zingg_JM » Tue Jun 06, 2017 1:59 pm

stevestrong wrote:For libmaple (Arduino_STM32 based) core I have implemented FSMC for LCD 16 bit parallel access, as described here.
Check here the benchmark.
Aha, finally found it browsing on GitHub:

https://github.com/stevstrong/Arduino_S ... es/SPI/src

But found only in the comment there, need to go searching.

A direct link would be soooo welcome!

Aha, the second link was revealing more, here it is:

https://github.com/stevstrong/Adafruit_ ... 6bit_STM32

Thank you, Steve.
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danieleff
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Re: [STM32GENERIC] FSMC - SRAM

Post by danieleff » Wed Jun 07, 2017 5:22 am

Steves version is this I guess: https://github.com/stevstrong/Arduino_S ... ple/fsmc.h

For STM32GENERIC, I added an example to board examples/blackf407/lowlevelhal/fsmclcd

Pin setup and initialization settings needs to be adapted to the board.

Sending 65536 values takes 7 ms (I guess FIFO helps the loop). Timing values can be adjusted using FSMC_NORSRAM_TimingTypeDef to match the peripheral.
fsmc.png
fsmc.png (54.19 KiB) Viewed 344 times

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Zingg_JM
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Re: [STM32GENERIC] FSMC - SRAM

Post by Zingg_JM » Sat Jun 10, 2017 8:10 am

Thank you all.

I first had to resolve my STM32 packages confusion once more: http://www.stm32duino.com/viewtopic.php ... 401#p29401
Now I see a good chance to get started using FSMC.
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Pito
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Re: [STM32GENERIC] FSMC - SRAM

Post by Pito » Sat Jun 10, 2017 10:49 am

@Daniel: I am starting to mess with SRAM on the Black 407ZET. Trying to use the built-in FSMC init in \system\STM32F4\HAL_Src\system_stm32f4xx.c.
It seems we have to introduce a parameter, for example

Code: Select all

#define SRAM_SUBBANK x
where x is from 1..4 (chip select NE1, NE2, NE3, NE4 within the Bank).

The Black F407ZET is using BANK1, SUBBANK 3 (NE3).
The driver is hardwired to BANK1, SUBBANK 2 (NE2).

Based on the SUBBANK in these 3 lines the indexes has to be adjusted (imho):

Code: Select all

  /* Configure and enable Bank1_SRAM2 */
  FSMC_Bank1->BTCR[2]  = 0x00001011;
  FSMC_Bank1->BTCR[3]  = 0x00000201;
  FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
Also the init of pin NEx has to be parametric, it seems.
And finally, we need ADDSET and DATAST to be set as well (based on the SRAM speed).

So for example

Code: Select all

#define SRAM_SUBBANK 3
#define ADDSET 2
#define DATAST 2
..
 #if (SRAM_SUBBANK == 2) 
  /* Connect PGx pins to FMC Alternate function */
  GPIOG->AFR[0]  = 0x00CCCCCC;
  GPIOG->AFR[1]  = 0x000000C0;  // NE2 = PG9
  /* Configure PGx pins in Alternate function mode */ 
  GPIOG->MODER   = 0x00085AAA;
  /* Configure PGx pins speed to 100 MHz */ 
  GPIOG->OSPEEDR = 0x000CAFFF;
  /* Configure PGx pins Output type to push-pull */  
  GPIOG->OTYPER  = 0x00000000;
  /* No pull-up, pull-down for PGx pins */ 
  GPIOG->PUPDR   = 0x00000000;
 #endif
 #if (SRAM_SUBBANK == 3) 
  /* Connect PGx pins to FMC Alternate function */
  GPIOG->AFR[0]  = 0x00CCCCCC;
  GPIOG->AFR[1]  = 0x00000C00;  // NE3 = PG10
  /* Configure PGx pins in Alternate function mode */ 
  GPIOG->MODER   = 0x00205AAA;   // DOUBLECHECK
  /* Configure PGx pins speed to 100 MHz */ 
  GPIOG->OSPEEDR = 0x003CAFFF;  // DOUBLECHECK
  /* Configure PGx pins Output type to push-pull */  
  GPIOG->OTYPER  = 0x00000000;
  /* No pull-up, pull-down for PGx pins */ 
  GPIOG->PUPDR   = 0x00000000;
 #endif
..
  /* Configure and enable Bank1_SRAMx */
  FSMC_Bank1->BTCR[2*(SRAM_SUBBANK-1)]  = 0x00001011;
  FSMC_Bank1->BTCR[2*(SRAM_SUBBANK-1) + 1]  = (DATAST << 8) | ADDSET;   // this is the "BTRx" reg
  FSMC_Bank1E->BWTR[2*(SRAM_SUBBANK-1)] = 0x0FFFFFFF;
Not tested yet..

Update: in variant.cpp I put

Code: Select all

#include <Arduino.h>

#include "stm32_gpio.h"

#include "syscalls.h"

extern "C" void preinitVariant() {
    //Set heap to external SRAM
    setHeap((unsigned char*)0x68000000, (unsigned char*)(0x68000000 + 512 * 1024));
}
When running Bubblesort_Heap demo it works when it allocates (with malloc()) an array which fits into the internal sram.
It crashes when the size of the array is larger. Therefore it seems your new Heap allocation does not work.. (it seems the heap is still put in the internal sram).
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Pito
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Re: [STM32GENERIC] FSMC - SRAM

Post by Pito » Sat Jun 10, 2017 5:31 pm

With my "old" above Heap mechanism it works (needs more testing, maybe the CRC32 would be better to have), Black F407ZET 168MHz, SRAM 256kx16, 10ns, with

Code: Select all

#define ADDSET 5
#define DATAST 5

Code: Select all

Allocating EXRAM32 memory..
********
Generating 40000 32bit uints:
Checksum: 37501584892097
BubbleSorting 32bit uints:
Wait while BubbleSorting.. Loops 0 out of 40000
Wait while BubbleSorting.. Loops 1000 out of 40000
..
Wait while BubbleSorting.. Loops 38000 out of 40000
Wait while BubbleSorting.. Loops 39000 out of 40000
Elapsed: 385498  msecs
Checksum: 37501584892097
Sorted last 10 in ascending order:
39990 1999451338
39991 1999457766
39992 1999465354
39993 1999506116
39994 1999558287
39995 1999603552
39996 1999650861
39997 1999652871
39998 1999767775
39999 1999901586
This is much faster with

Code: Select all

#define ADDSET 2
#define DATAST 2

Code: Select all

Allocating EXRAM32 memory..
********
Generating 40000 32bit uints:
Checksum: 37501584892097
BubbleSorting 32bit uints:
Wait while BubbleSorting.. Loops 0 out of 40000
..
Wait while BubbleSorting.. Loops 39000 out of 40000
Elapsed: 214213  msecs
Checksum: 37501584892097
Sorted last 10 in ascending order:
39990 1999451338
39991 1999457766
39992 1999465354
39993 1999506116
39994 1999558287
39995 1999603552
39996 1999650861
39997 1999652871
39998 1999767775
39999 1999901586
Last edited by Pito on Sat Jun 10, 2017 5:46 pm, edited 3 times in total.
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danieleff
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Re: [STM32GENERIC] FSMC - SRAM

Post by danieleff » Sat Jun 10, 2017 5:40 pm

Pito wrote: Update: in variant.cpp I put

Code: Select all

#include <Arduino.h>

#include "stm32_gpio.h"

#include "syscalls.h"

extern "C" void preinitVariant() {
    //Set heap to external SRAM
    setHeap((unsigned char*)0x68000000, (unsigned char*)(0x68000000 + 512 * 1024));
}
When running Bubblesort_Heap demo it works when it allocates (with malloc()) an array which fits into the internal sram.
It crashes when the size of the array is larger. Therefore it seems your new Heap allocation does not work.. (it seems the heap is still put in the internal sram).
If a file only contains functions that are weak in other place, and nothing else from this file is called, that function will be not linked.

Basically try putting `extern void preinitVariant()` into the systemclock_config.c file. I do not know what gcc compiler quirk is it.

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Pito
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Re: [STM32GENERIC] FSMC - SRAM

Post by Pito » Sat Jun 10, 2017 5:59 pm

This is the fastest setting which works @168MHz and with the 10ns SRAM:

Code: Select all

#define ADDSET 1
#define DATAST 3
EDIT: Increased DATAST from 2 to 3 after heavy testing.

Code: Select all

Allocating EXRAM32 memory..
********
Generating 40000 32bit uints:
Checksum: 37501584892097
BubbleSorting 32bit uints:
Wait while BubbleSorting.. Loops 0 out of 40000
..
Wait while BubbleSorting.. Loops 39000 out of 40000
Elapsed: 185666  msecs
Checksum: 37501584892097
Sorted last 10 in ascending order:
39990 1999451338
39991 1999457766
39992 1999465354
39993 1999506116
39994 1999558287
39995 1999603552
39996 1999650861
39997 1999652871
39998 1999767775
39999 1999901586
Last edited by Pito on Tue Jun 13, 2017 11:28 am, edited 4 times in total.
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Pito
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Re: [STM32GENERIC] FSMC - SRAM

Post by Pito » Sat Jun 10, 2017 6:07 pm

And this is with Black F407ZET @240MHz and the 10ns SRAM, the fastest setting which works reliably is with

Code: Select all

#define ADDSET 1
#define DATAST 4

Code: Select all

Allocating EXRAM32 memory..
********
Generating 40000 32bit uints:
Checksum of generated random numbers: 37501584892097
Checksum of unsorted EXRAM32 content: 37501584892097
BubbleSorting 32bit uints:
Wait while BubbleSorting.. Loops 0 out of 40000
..
Wait while BubbleSorting.. Loops 39000 out of 40000
Elapsed: 169922  msecs
Checksum of sorted numbers: 37501584892097
Sorted last 10 in ascending order:
39990 1999451338
39991 1999457766
39992 1999465354
39993 1999506116
39994 1999558287
39995 1999603552
39996 1999650861
39997 1999652871
39998 1999767775
39999 1999901586
UPDATE: I updated the Bubble Sort demo
http://www.stm32duino.com/viewtopic.php ... 839#p27839
such it prints out the sum of generated numbers as well.
When you set the timing parameters ADDSET and DATAST too low you might see the check sums start mismatch..

Could someone out of two there :P be so kind and try the above demo with the F746 and the SDRAM?
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Zingg_JM
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Re: [STM32GENERIC] FSMC - SRAM

Post by Zingg_JM » Tue Jun 13, 2017 9:51 am

@Pito

Thank you for the tips how and where to enable FSMC SRAM on STM32F407ZET6. I am trying to get it working on DESTM32-L demo board.

I have 2 questions:

1. so far I get strange results (see below), could this be a timing issue?

2. I ordered a "black" STM32F407ZET6 board, it has solder pads on the back side for SRAM. Did you find such a board with soldered SRAM?

Thank you.

Code: Select all

// FMSC_SRAM_TEST

#define FSMC_BANK1             ((void*)0x60000000)
#define FSMC_NOR_PSRAM_REGION1 ((void*)0x60000000) // NE1
#define FSMC_NOR_PSRAM_REGION2 ((void*)0x64000000) // NE2
#define FSMC_NOR_PSRAM_REGION3 ((void*)0x68000000) // NE3
#define FSMC_NOR_PSRAM_REGION4 ((void*)0x6C000000) // NE4
#define FSMC_BANK2             ((void*)0x70000000)
#define FSMC_BANK3             ((void*)0x80000000)
#define FSMC_BANK4             ((void*)0x90000000)

struct fmsc_sram_type
{
  uint8_t test_buffer8[1000];
  uint16_t test_buffer16[1000];
  uint16_t test_buffer32[1000];
};

#define FMSC_SRAM ((fmsc_sram_type*)0x68000000) // NE3 PG10 on DESTM32-L

void setup() 
{
  bool ok = true;
  Serial1.begin(115200);
  Serial1.println();
  Serial1.println("FMSC_SRAM_TEST");
  for (uint8_t i = 0; i < 100; i++)
  {
    FMSC_SRAM->test_buffer8[i] = i;
    FMSC_SRAM->test_buffer16[i] = i;
    FMSC_SRAM->test_buffer32[i] = i;
  }
  for (uint8_t i = 0; i < 100; i++)
  {
    ok = ok && (FMSC_SRAM->test_buffer8[i] == i);
    if (FMSC_SRAM->test_buffer8[i] != i)
    {
      uint8_t v = FMSC_SRAM->test_buffer8[i];
      uint8_t v2 = FMSC_SRAM->test_buffer8[i];
      Serial1.print("(8)  ? "); Serial1.print(i); Serial1.print(" : "); Serial1.print(v); Serial1.print(" : "); Serial1.println(v2);
    }
  }
  Serial1.println(ok ? "ok" : "not ok");
  for (uint8_t i = 0; i < 100; i++)
  {
    ok = ok && (FMSC_SRAM->test_buffer16[i] == i);
    if (FMSC_SRAM->test_buffer16[i] != i)
    {
      uint16_t v = FMSC_SRAM->test_buffer16[i];
      uint16_t v2 = FMSC_SRAM->test_buffer16[i];
      Serial1.print("(16) ? "); Serial1.print(i); Serial1.print(" : "); Serial1.print(v); Serial1.print(" : "); Serial1.println(v2);
    }
  }
  Serial1.println(ok ? "ok" : "not ok");
  for (uint8_t i = 0; i < 100; i++)
  {
    ok = ok && (FMSC_SRAM->test_buffer32[i] == i);
    if (FMSC_SRAM->test_buffer32[i] != i)
    {
      uint16_t v = FMSC_SRAM->test_buffer32[i];
      uint16_t v2 = FMSC_SRAM->test_buffer32[i];
      Serial1.print("(32) ? "); Serial1.print(i); Serial1.print(" : "); Serial1.print(v); Serial1.print(" : "); Serial1.println(v2);
    }
  }
  Serial1.println(ok ? "ok" : "not ok");
}

void loop() 
{
}

Code: Select all

FMSC_SRAM_TEST
(8)  ? 0 : 99 : 99
(8)  ? 2 : 0 : 0
(8)  ? 4 : 2 : 2
(8)  ? 6 : 4 : 4
(8)  ? 8 : 6 : 6
(8)  ? 10 : 8 : 8
(8)  ? 11 : 9 : 9
(8)  ? 12 : 8 : 8
(8)  ? 14 : 12 : 12
(8)  ? 16 : 14 : 14
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(8)  ? 40 : 38 : 38
(8)  ? 41 : 47 : 47
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(8)  ? 43 : 47 : 47
(8)  ? 44 : 40 : 40
(8)  ? 45 : 47 : 47
(8)  ? 46 : 40 : 40
(8)  ? 48 : 40 : 40
(8)  ? 50 : 48 : 48
(8)  ? 52 : 50 : 50
(8)  ? 53 : 55 : 55
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(8)  ? 58 : 56 : 56
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(8)  ? 90 : 88 : 88
(8)  ? 92 : 90 : 90
(8)  ? 94 : 92 : 92
(8)  ? 96 : 94 : 94
(8)  ? 98 : 96 : 96
not ok
(16) ? 0 : 25442 : 25442
(16) ? 1 : 866 : 866
(16) ? 2 : 866 : 866
(16) ? 3 : 98 : 98
(16) ? 4 : 99 : 99
(16) ? 5 : 4 : 4
(16) ? 6 : 5 : 5
(16) ? 7 : 6 : 6
(16) ? 8 : 7 : 7
(16) ? 9 : 8 : 8
(16) ? 10 : 8 : 8
(16) ? 11 : 10 : 10
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(16) ? 65 : 48 : 48
(16) ? 66 : 49 : 49
(16) ? 67 : 98 : 98
(16) ? 68 : 99 : 99
(16) ? 69 : 68 : 68
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(16) ? 78 : 77 : 77
(16) ? 79 : 78 : 78
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(16) ? 81 : 80 : 80
(16) ? 82 : 80 : 80
(16) ? 83 : 82 : 82
(16) ? 84 : 83 : 83
(16) ? 85 : 84 : 84
(16) ? 86 : 85 : 85
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(16) ? 89 : 88 : 88
(16) ? 90 : 89 : 89
(16) ? 91 : 90 : 90
(16) ? 92 : 91 : 91
(16) ? 93 : 92 : 92
(16) ? 94 : 93 : 93
(16) ? 95 : 94 : 94
(16) ? 96 : 95 : 95
(16) ? 97 : 80 : 80
(16) ? 98 : 80 : 80
(16) ? 99 : 82 : 82
not ok
(32) ? 0 : 83 : 83
(32) ? 1 : 0 : 0
(32) ? 2 : 0 : 0
(32) ? 3 : 2 : 2
(32) ? 4 : 3 : 3
(32) ? 5 : 4 : 4
(32) ? 6 : 5 : 5
(32) ? 7 : 6 : 6
(32) ? 8 : 7 : 7
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(32) ? 60 : 58 : 58
(32) ? 61 : 60 : 60
(32) ? 62 : 61 : 61
(32) ? 64 : 63 : 63
(32) ? 65 : 64 : 64
(32) ? 66 : 64 : 64
(32) ? 67 : 66 : 66
(32) ? 68 : 67 : 67
(32) ? 69 : 68 : 68
(32) ? 70 : 69 : 69
(32) ? 71 : 70 : 70
(32) ? 72 : 71 : 71
(32) ? 73 : 72 : 72
(32) ? 74 : 72 : 72
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(32) ? 81 : 80 : 80
(32) ? 82 : 80 : 80
(32) ? 83 : 82 : 82
(32) ? 84 : 83 : 83
(32) ? 85 : 84 : 84
(32) ? 86 : 85 : 85
(32) ? 87 : 86 : 86
(32) ? 88 : 87 : 87
(32) ? 89 : 88 : 88
(32) ? 90 : 88 : 88
(32) ? 91 : 90 : 90
(32) ? 92 : 91 : 91
(32) ? 93 : 92 : 92
(32) ? 94 : 93 : 93
(32) ? 96 : 95 : 95
(32) ? 97 : 96 : 96
(32) ? 98 : 96 : 96
(32) ? 99 : 98 : 98
not ok
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