Search found 131 matches
- Mon Mar 16, 2020 8:00 pm
- Forum: General discussion
- Topic: [Solved]blue pill and ILI9341 tft
- Replies: 15
- Views: 13221
Re: blue pill and ILI9341 tft
for F103 chip default spi pins are MOSI=PA7, MISO=PA6, SCK=PA5, SS=PA4
- Mon Mar 16, 2020 7:39 pm
- Forum: General discussion
- Topic: [Solved]blue pill and ILI9341 tft
- Replies: 15
- Views: 13221
Re: blue pill and ILI9341 tft
according to https://github.com/rogerclarkmelbourne/Arduino_STM32/blob/master/STM32F1/libraries/Adafruit_ILI9341_STM/Adafruit_ILI9341_STM.h this library have only one constructor Adafruit_ILI9341_STM(int8_t _CS, int8_t _DC, int8_t _RST = -1); so your compile error is ok it assume to use predefined h...
- Wed Mar 11, 2020 2:36 pm
- Forum: Custom design boards
- Topic: Other USB_CONNECT pin on STM32F4xx
- Replies: 5
- Views: 6987
Re: Other USB_CONNECT pin on STM32F4xx
Usb device mode doesn't require any "usb_connect" pins, only dm/dp (pa11/12) and gnd, so u can use pd2 without any problems
- Fri Mar 06, 2020 5:58 am
- Forum: STM boards (Discovery, Eval, Nucleo, ...)
- Topic: Support for STM32H743VIT6
- Replies: 3
- Views: 4093
- Tue Mar 03, 2020 8:57 am
- Forum: General discussion
- Topic: STM32F103VET6 availabilty
- Replies: 9
- Views: 6073
Re: STM32F103VET6 availabilty
if you are still calling construcor for software spi, it's ok that it's slow
if not, use SPI.setClockDivider(2..256) to set faster bus clock (by default it close to 4MHz, but depends on your hardware), or, better, use SPISettings to configure your slaves with proper params for each
if not, use SPI.setClockDivider(2..256) to set faster bus clock (by default it close to 4MHz, but depends on your hardware), or, better, use SPISettings to configure your slaves with proper params for each
- Mon Mar 02, 2020 3:12 pm
- Forum: General discussion
- Topic: STM32F103VET6 availabilty
- Replies: 9
- Views: 6073
Re: STM32F103VET6 availabilty
hello @.rpv blink ok, Serial ok but SPI not working. i am trying to run graphics test code from adafruit its compiling but not able to get anything on display. I kept like this. #define TFT_MISO PB14 #define TFT_MOSI PB15 #define TFT_CLK PB13 #define TFT_CS PB12 #define TFT_DC PD9 #define TFT_RST P...
- Sat Feb 29, 2020 8:38 pm
- Forum: General discussion
- Topic: STM32F103C8T6: Confirmation of counterfeiting by ST
- Replies: 14
- Views: 19983
Re: STM32F103C8T6: Confirmation of counterfeiting by ST
it's much better to buy f3xx/f4xx instead
f103 line have to rip finally
f103 line have to rip finally
- Thu Feb 27, 2020 1:35 pm
- Forum: General discussion
- Topic: [SOLVED] STM32F030F4 Internal RC
- Replies: 9
- Views: 9392
Re: STM32F030F4 Internal RC
yes, boot0 have to be pulled down for normal operation
- Thu Feb 27, 2020 7:08 am
- Forum: General discussion
- Topic: watchdog to reboot the board
- Replies: 4
- Views: 8790
Re: watchdog to reboot the board
#define LIBMAPPLE_CORE //comment it for HAL based core #define IWDG_PR_DIV_4 0x0 #define IWDG_PR_DIV_8 0x1 #define IWDG_PR_DIV_16 0x2 #define IWDG_PR_DIV_32 0x3 #define IWDG_PR_DIV_64 0x4 #define IWDG_PR_DIV_128 0x5 #define IWDG_PR_DIV_256 0x6 typedef enum iwdg_prescaler { IWDG_PRE_4 = IWDG_PR_DIV_...
- Tue Feb 25, 2020 6:54 pm
- Forum: Ideas & suggestions
- Topic: Stm32f103c8t6 pulses
- Replies: 4
- Views: 9405
Re: Stm32f103c8t6 pulses
im not sure it's possible with any core, but using HAL/CMSIS or in general as a concept it can be implemented using two timers one timer in input capture mode capturing raising (or falling) edge, and second timer triggered by first timer overflow target frequency will be timer2 count * timer 1 overf...