[Solved] Can't remap Timer3 to PB4 on BluePill

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rsonnicksen
Posts: 9
Joined: Fri Dec 16, 2022 4:28 pm

[Solved] Can't remap Timer3 to PB4 on BluePill

Post by rsonnicksen »

I've tried everything I can think of. I'm not good at locating non-Arduino functions in the Maple library, so I do a bit of direct register manipulation (using defines and enums from the library). I have timer3 running as output compare, and its generating a square wave on PA6 (T3C1). I want to move this to PB4 which is 5V tolerant because I'm controlling a stepper driver which requires at least 4 Volts. I want to run PB4 as open drain.
Here is what I've tried:

RCC_BASE->APB2ENR |= 1; //enable the alternate function IO clock
AFIO_BASE->MAPR |= AFIO_MAPR_TIM3_REMAP_PARTIAL; //remap T3C1 and T3C2 to pins PB4 and PB5

GPIOB_BASE->CRL |= (GPIO_AF_OUTPUT_OD << 16); //Set PB4 as AF output open-drain, max speed 50 MHz.

what am I missing here?
I'm not calling the pinMode routine for PB4, as I'm not sure how to set it up for a remapped alternate function output with open drain.
The PINOUT diagram for BluePill indicates that PB4 is NOT a PWM pin, so I don't think "pinMode(PB4, PWM)" is the answer. Besides, I've tried it.

I've also checked to make sure the AF clock for other peripherals (SPI1) which share PB4 are not enabled.

I'm confused by how the STM32 RefManual refers to Alternate Function vs a Remapped Alternate Function.
HELP?....
Last edited by rsonnicksen on Wed Dec 28, 2022 2:20 pm, edited 1 time in total.
rsonnicksen
Posts: 9
Joined: Fri Dec 16, 2022 4:28 pm

Re: Can't remap Timer3 to PB4 on BluePill

Post by rsonnicksen »

Solved. Apparently the JTAG/SWO function is enabled by default, and this uses pins PA15, PB3 and PB4.
I disabled this by writing 0b010 to the SWJ_CFG bits of the AFIO_MAPR register.

So my working remap looks like this:

//Configure Alternate Function Remap for Timers 2 and 3 to move them to 5V tolerant pins
RCC_BASE->APB2ENR |= 1;
AFIO_BASE->MAPR |= AFIO_MAPR_TIM2_REMAP_PA15_PB3_PA2_PA3 | AFIO_MAPR_TIM3_REMAP_PARTIAL | AFIO_MAPR_SWJ_CFG_NO_JTAG_SW;
//AFIO_MAPR_TIM2_REMAP_PA15_PB3_PA2_PA3 remaps T2C1 and T2C2 to PA15 and PB3
//AFIO_TIM3_REMAP_PARTIAL maps output T3C1-4 to PB4, PB5, PB0 (not remapped), PB1 (not remapped)
//AFIO_MAPR_SWJ_CFG_NO_JTAG_SW disables JTAG debugger which uses PB4. By default this is enabled, so needs to be disabled.

//PA15 set as alternate function open drain output
GPIOA_BASE->CRH |= (GPIO_AF_OUTPUT_OD << 28); //set bits 31 and 30.(Alternate function). Set 28,29 (50 MHz max)

//Configure step output as open drain
//PB4 set as alternate function open drain output, 50 MHz max
GPIOB_BASE->CRL |= (GPIO_AF_OUTPUT_OD << 16);

//PB6 set as alternate function open drain output, 50 MHz max
GPIOB_BASE->CRL |= (GPIO_AF_OUTPUT_OD << 24);
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