Taking a look at STM32G0 series

[ag123]

I tried making a mapping of the AFIO pinouts (not all AF grouping), apparently it looked like this:

stm32g030f6 afio pinout

stm32g030f6-pin-min.png (43.83 KiB) Viewed 30732 times

what is somewhat interesting is that there is this osc_en and osc32_en pins on pin3 pc15.
I'm not too sure how this would be used, and it seemed HSE can be selected by selecting grouping AF1 on port PC

for AF0 grouping
it seemed if PA0-PA2 is used solely as inputs, then PA4-7 can be used for SPI
uart seemed most appropriate on pin 1 PB7 USART1_RX, pin 20 PB6 USART1_TX
it seemed also I2C requires selection of AF6 grouping and that it seemed they wouldn't co-exist with SPI or UART (i'm not sure about this)

This is actually a LibreOffice spreadsheet, it can be imported to google sheets for viewing/editing.
Rename the attached zip file as stm32g030f6.ods to open in LibreOffice.

[mack]

That's a great way of displaying it's connectivity !

[dannyf]

don't have an actual chip yet but I got my stm32f0 code base for an arduino clone up and compiled it successfully for a stm32g0.

[dannyf]

finished the clock tree. numerous ccipr definitions are missing. looks like they were accidentally deleted.

[ag123]

i think we'd need the headers for g0 and maybe some libraries
https://www.st.com/en/embedded-software ... ubeg0.html

this is probably there in the 'official' stm32duino core

[dannyf]

the header files are vendor provided. in this case, mdk5 and stmcubide use the same header files copyrighted by stm.

BTW, cubide was a struggle to use. it took a long time to load.

[dannyf]

got my G0 on the slow boat from china.

put the chip on a pcb without anything else, but wires to a stlink.

got the clock tree working now -> HSI / HSE and their PLL equivalents.

The PLL is actually quite limiting - the Fvco is like 96Mhz / 8x minimum. and the divider is 8x maximum. so 12Mhz is the lowest you can go.

Fairly easy to play with, I have to say.

[dannyf]

I haven't explored much -> only a couple hours with this chip. but not much practical difference between the G030 and F030.

[dannyf]

PLL works down to 1/8x (2Mhz using HSI), and up to 80Mhz (vs. 64Mhz spec).

So if you are looking for a cheap but fast chip, the G0 seems to foot the bill, over the F0.

[ag123]

oops i'd need to catch up, i stashed it in the box.
g0 is 'slightly improved', e.g. the adc etc.
I'd likely try HSI, as I'd use one of those SOIC-20 'adaptor' boards and my breadboard.