EEPROM library for STM32F4

[sergey3778]

Hi.
I am using the Roger's core in the Arduino IDE 2.0.3. Board type STM32F4VE.
I have a need to implement Flash based EEPROM in STM32F4 family controller. In Roger's core, this is implemented only for controllers of the STM32F1 family. For this, the corresponding EEPROM library has been created.
The problem is that this library is not suitable for the STM32F4 family. It is known that the STM32F4 family uses a different register's map to control flash memory than the STM32F1. So I'm asking for help in solving this problem. Maybe someone has a library for implementing EEPROM for Roger's core.
Thanks for any help.

[ag123]

you can probably make one from scratch, or to adapt the library, the key is to review
RM0009 to see how it works
https://www.st.com/resource/en/referenc ... ronics.pdf

it isn't too difficult once you get the hang of which registers to use to configure, read, erase, write flash.
reading is mostly a 'non event' it is as simple as

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void *address = flash_bank_address + index*wordsize

then reading could be simply

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uint32_t value = *((* uint32_t)(address));

it is the erasing and writing part that one need to meddle with the registers.

[sergey3778]

Thank you for your reply.
I started working on creating my own EEPROM library for the STM32F4 family. I took the library from Roger's for the STM32F1 family as a basis. Working with registers in this library is implemented in the files flash_stm32.h and flash_stm32.c. But the process was not as simple as it seems from the outside. Inconsistencies in the register's map were found. The use of such registers for the STM32F1 family is described in the flash.h file, and for the STM32F4 family a completely different flash.h file is used.

This is the register's map for the STM32F1 family:

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typedef struct flash_reg_map {
    __IO uint32 ACR;            /**< Access control register */
    __IO uint32 KEYR;           /**< Key register */
    __IO uint32 OPTKEYR;        /**< OPTKEY register */
    __IO uint32 SR;             /**< Status register */
    __IO uint32 CR;             /**< Control register */
    __IO uint32 AR;             /**< Address register */
    __IO uint32 OBR;            /**< Option byte register */
    __IO uint32 WRPR;           /**< Write protection register */
} flash_reg_map;

And this is the register's map for the STM32F4 family:

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typedef struct flash_reg_map {
    __IO uint32 ACR;            /**< Access control register, Address offset: 0x00 */
    __IO uint32 KEYR;           /**< Key register, offset: 0x04 */
    __IO uint32 OPTKEYR;        /**< OPTKEY register, offset: 0x08 */
    __IO uint32 SR;             /**< Status register, offset: 0x0c */
    __IO uint32 CR;             /**< Control register, offset: 0x10 */
    __IO uint32 OPTCR;          /**< Flash option control register, offset: 0x14 */
    __IO uint32 OPTCR1;         /**< Flash option control register 1, F42xxx and F43xxx,, offset: 0x18 */
} flash_reg_map;

In the second variant, there is no address register AR. Where to get it is still unclear.
In addition, there are bit mismatches in the registers themselves. For example, in the STM32F4 family, all FLASH_SR_PGAERR, FLASH_SR_PGPERR, FLASH_SR_PGSERR bits are used in comparison with the STM32F1 family, one FLASH_SR_PGERR_BIT bit is used.
Apparently the addressing method in the STM32F4 family is different. I think the reason lies in the size of flash memory pages: 128KB instead of 1KB.

[ag123]

it is necessary to review the ref manual for your particular soc e.g. STM32F4xx
for F405/F417/F437/F439 it is apparently rm0009
https://www.st.com/resource/en/referenc ... ronics.pdf
(for another other mcus it'd be better to refer to the specific ref manual than this)
chapter 3 3 Embedded Flash memory interface apparently covers it in detail

reading is mostly 'memory' i.e. simply point the address where you need and read the word/byte etc.
writing is actually similar, just that there are erase and programming steps which requires access to the registers.
see 3.6 Erase and program operations
accordingly after you erase a block (it erase the whole block in a go), all that bits will become 0xFF, all ones.
then programming it flips the ones to zeros. this can go one byte at a time the smallest unit
programming is similar to 'writing to memory' for the particular address, but just prior to this, the registers need to be configured for that or the mcu would throw an exception.
it is practically more than just an 'eeprom', it is flash memory