HSI, HSE, PLL ???

[STM32ardui]

I used a program without SystemClock_Config() and placed inside setup():

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f1 = HAL_RCC_GetSysClockFreq();
f2 = HAL_RCC_GetHCLKFreq();
Serial.printf("SYSCLK: %d  HCLK : %d\n",f1,f2);

and result is: SYSCLK: 64000000 HCLK : 64000000

So with HSI it is possible to run core with 64 MHz ?

[ag123]

it would seem a bit strange as if you look at the clock tree a few posts back
viewtopic.php?p=14575#p14575
the only way to get 64 Mhz is from PLL R
so if PLL is fed from HSI it works and from HSE it doesn't ?

a way to seriously measure SYSCLK is to count the systicks i.e. millis() against RTC second interrupt.
i.e. how many millis() does it take to count 1 RTC second, if that is more or less than 1000 then that SYSCLK is probably not at the 'expected' frequency
there is a catch though systick is derived from HCLK (AHB clocks)
viewtopic.php?p=14575#p14575
if HCLK (AHB clocks) is SYSCLK / 2, then that is half !

accordingly SYSTICK is configured according to PM0223 Cortex M0+ programming manual
https://www.st.com/resource/en/programm ... ronics.pdf

SysTick timer (STK)
When enabled, the timer counts down from the reload value to zero, reloads (wraps to) the value in the
SYST_RVR on the next clock cycle, then decrements on subsequent clock cycles. Writing a value of zero to the
SYST_RVR disables the counter on the next wrap. When the counter transitions to zero, the COUNTFLAG status
bit is set to 1. Reading SYST_CSR clears the COUNTFLAG bit to 0.Writing to the SYST_CVR clears the register
and the COUNTFLAG status bit to 0. The write does not trigger the SysTick exception logic. Reading the register
returns its value at the time that it is accessed.

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Address Name Type Required privilege Reset value Description 
0xE000E010 STK_CSR RW Privileged 0x00000000 Section 4.4.1: SysTick control and status register (STK_CSR)
0xE000E014 STK_RVR RW Privileged Unknown Section 4.4.2: SysTick reload value register (STK_RVR)
0xE000E018 STK_CVR RW Privileged Unknown Section 4.4.3: SysTick current value register (STK_CVR)
0xE000E01C STK_CALIB RO Privileged 0xC0000000(1) Section 4.4.4: SysTick calibration value register (STK_CALIB)

SysTick control and status register (STK_CSR)

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Bits31:17 Reserved, must be kept cleared.
Bit 16 COUNTFLAG Returns 1 if timer counted to 0 since the last read of this register.
Bits 15:3 Reserved, must be kept cleared.
Bit 2 CLKSOURCE Selects the SysTick timer clock source:
0 = External reference clock.
1 = Processor clock.
Bit 1 TICKINT Enables SysTick exception request:
0 = Counting down to zero does not assert the SysTick exception request.
1 = Counting down to zero to asserts the SysTick exception request.
Bit 0 ENABLE Enables the counter:
0 = Counter disabled.
1 = Counter enabled

SysTick reload value register (STK_RVR)
The STK_RVR specifies the start value to load into the SYST_CVR. See the register summary in
Table 32. System timer registers summary for its attributes. The bit assignments are:

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Bits 23:0 RELOAD Value to load into the STK_CVR when the counter is enabled and when it reaches 0, see Calculating the RELOAD
value
Bits31:24 Reserved, must be kept cleared.

then in rm0444
https://www.st.com/resource/en/referenc ... ronics.pdf
5.2 Reset and clocks control - Clocks

SysTick (Cortex® core system timer), with these clock sources to select from:
– HCLK (AHB clock)
– HCLK clock divided by 8
The selection is done through SysTick control and status register.
HCLK is used as Cortex®-M0+ free-running clock (FCLK). For more details, refer to the
programming manual PM0223.

it seemed External reference clock and Processor clock maps to HCLK and HCLK / 8 but it is uncertain which is mapped to which.
maybe Processor clock = HCLK / 8

[STM32ardui]

so if PLL is fed from HSI it works and from HSE it doesn't ?

Today (it's cooler outside and also inside flat) it works with HSE.

I let STM32CubeIDE generate a new SystemClock_Config() and I don't care about USB!

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void SystemClock_Config(void)
{
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

  /** Configure the main internal regulator output voltage
  */
  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);

  /** Initializes the RCC Oscillators according to the specified parameters
  * in the RCC_OscInitTypeDef structure.
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
  RCC_OscInitStruct.PLL.PLLN = 16;
  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  {
    Error_Handler();
  }

  /** Initializes the CPU, AHB and APB buses clocks
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                              |RCC_CLOCKTYPE_PCLK1;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
  {
    Error_Handler();
  }
} 

With multiplier x16 sketch is running and tells me 64 MHz SYSCLK and HCLK.

[ag123]

this looks correct, you are running at 64 Mhz, cpu and all the busses and off HSE - external crystal !

io should be super fast, try testing the gpios
it'd be amazing if you can make n Mhz square waves with codes
being able to switch at such speeds opens doors to apps that may not be otherwise possible, e.g. arbitrary signalling and control
e.g. if you can do gpio at 12 Mhz you can even 'bit bang' usb full speed