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Re: New APM32F103CB
Posted: Sun Mar 29, 2020 12:15 pm
by blue-man
ag123 wrote: Sun Mar 29, 2020 11:33 am
for the FPU, my guess is one would need to just ask for it (the documentation) from the manufacturer expressing interest.
Referring to my question
blue-man wrote: Sat Mar 28, 2020 5:33 pm
i am asking me what would have happened, if you would have explained this dependencies to the manufacturer?
it seems to be my part to do this.
But first i will only ask for further documentation for the FPU.
I will post here if i get an answer ...
Re: New APM32F103CB
Posted: Sat Apr 04, 2020 8:09 am
by blue-man
Up to now there is no response from Apexmic.
But in a german forum the basic usage of the FPU have been decoded with disassembling of the library
sc_math.lib from the SDK
Code: Select all
Ok, 32-Bit-Float,
5 32-Bit-Register:
0: Opcode
1: Status, Bit0: Busy
2: Result
3: Op1
4: Op2
Opcodes:
1: asin
3: acos
5: atan
7: atan2
9: sin
11: cos
13: tan
...
289: fadd
293: fsub
295: fmul
45: fdiv
...
and the example
Code: Select all
00000000 <sc_math_sin>:
0: 4601 mov r1, r0
2: 2009 movs r0, #9
4: 4afe ldr r2, [pc, #1016] ; (400 <__wrap___ltsf2+0x2a>)
6: 6010 str r0, [r2, #0]
8: 4610 mov r0, r2
a: 60c1 str r1, [r0, #12]
c: bf00 nop
e: 48fc ldr r0, [pc, #1008] ; (400 <__wrap___ltsf2+0x2a>)
10: 6840 ldr r0, [r0, #4]
12: f000 0001 and.w r0, r0, #1
16: 2800 cmp r0, #0
18: d0f9 beq.n e <sc_math_sin+0xe>
1a: 48f9 ldr r0, [pc, #996] ; (400 <__wrap___ltsf2+0x2a>)
1c: 6880 ldr r0, [r0, #8]
1e: 4770 bx lr
at:
400: 40024000 .word 0x40024000
is the base address of the FPU hardware.
Re: New APM32F103CB
Posted: Sun Apr 05, 2020 6:47 pm
by Pito
Squonk42 wrote: Sun Mar 29, 2020 10:17 am
Here is the (Google) translation for page 14:
3.10. Floating Point Unit (FPU)
The product has a built-in independent FPU floating-point arithmetic processing unit, it supports the IEEE754 standard single-precision floating-point arithmetic.
As it is memory-mapped on the AHB bus (0x40024000-0x400243FF), it is probably not the standard ARM FPv4-SP core-integrated that can be found in the M4 or M7 cores.
As a noob I added a Cordic unit to my 32bit MicroBlaze in about 1 hour, therefore it cannot be a big problem for the guys who mastered the APM32F103 to add an FPU unit, where you write 1-2 32bit operands somewhere, set a bit somewhere and in 1-14clocks you read a result from somewhere.
Re: New APM32F103CB
Posted: Mon Apr 06, 2020 10:17 am
by Squonk42
Good!
So, just a simple single-precision floating point ALU with Cordic exposed in peripheral address space.
No SIMD vector or MAC operations and no saturation, so almost useless for all DSP usage.
Better than nothing
Re: New APM32F103CB
Posted: Mon Apr 06, 2020 1:27 pm
by blue-man
It's just another MCU that is STM32 compatible, with this bad documented FPU and QSPI goodie.
Re: New APM32F103CB
Posted: Mon Apr 06, 2020 1:48 pm
by Pito
In 1.0.2 version of their datasheet they list APM32E103x as the chips with an FPU, in 1.0.5 they list APM32F103x as the chips with an FPU.
The above "sc_math_sin asm" does not show the FPU usage at all, you have to dig deeper into asm to find out the actual sine() calculation. The FPU has got most probably only mul/div/add/sub in its most simple version, the full FPU in 4xx and above has got abs() and sqrt(), plus some fused DSP operations, plus conversions from int/fp and vice versa.
Even an single precision FPU with mul/div/add/sub would help. I would expect 5-7x speed up in an average.
Re: New APM32F103CB
Posted: Mon Apr 06, 2020 1:56 pm
by blue-man
We have ordered some of them and want to find it out ...
Re: New APM32F103CB
Posted: Mon Apr 06, 2020 1:59 pm
by Pito
You need libraries for their FPU usage, otherwise you would be lost..
PS: a search through the SDK shows FPU, with one global FPU interrupt, FPU clock enable flag and FPU_DIV flag.
Re: New APM32F103CB
Posted: Mon Apr 06, 2020 2:05 pm
by blue-man
There is a sc_math.lib in the SDK:
Code: Select all
extern float sc_math_sin(float x);
extern float sc_math_cos(float x);
extern float sc_math_tan(float x);
extern float sc_math_asin(float x);
extern float sc_math_acos(float x);
extern float sc_math_atan(float x);
extern float sc_math_atan2(float y, float x);
extern float sc_math_invsqrt(float x);
extern float sc_math_mac(float x, float y, float z);
extern float sc_math_sum_N(float* x, unsigned char n);
extern float sc_math_sub_N(float* x, unsigned char n);
extern float sc_math_prdct(float* x, unsigned char n);
extern float sc_math_sumsq(float* x, unsigned char n);
Re: New APM32F103CB
Posted: Mon Apr 06, 2020 2:51 pm
by Pito
That is good.
From my search above the FPU could work with 4 primitives add/sub/mult/div, while add/sub/mult is 1 cycle and div is more cycles (like 14 in F4xx).
The interrupt fires when div finished, imho.