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Re: AT32F403A anyone?

Posted: Tue Sep 06, 2022 4:32 pm
by webjorn
Hmmm,

In the AT32F403A GPIO(A-E) are not located on a APB bus, but stuck directly onto the AHB. The AHB is clocked at 240 Mhz. (not divided)
So, question becomes more interesting.....

Re: AT32F403A anyone?

Posted: Tue Sep 06, 2022 5:25 pm
by GonzoG
If you look at asm code, you'll see that there are few things MCU has to do between each GPIO change. That's why you get this speed.
for loop needs few MCU cycles for each loop (there's adding, comparison and jump).
If you want to do it as fast as possible, you need to get rid of any conditions, loops, etc. Just setting pins:
e.g.:

Code: Select all

GPIOB = 0;
GPIOB = 0xFFFF;
GPIOB = 0;
GPIOB = 0xFFFF;
GPIOB = 0;
GPIOB = 0xFFFF;
....
GPIOB = 0;
GPIOB = 0xFFFF;
GPIOB = 0;
GPIOB = 0xFFFF;
And like few thousand lines....

Re: AT32F403A anyone?

Posted: Tue Sep 06, 2022 10:07 pm
by webjorn
Hi Gonzo,

Yes, unrolling the loop probably gives better performance, still, I am not convinced *exactly where* the bottleneck is, I believe the AHB bus is
running at 240 Mhz, however I am not sure the GPIO clock is at that level, and the AT32F403A *is* different in the clock tree (vs STM32XXX).

I am just trying to understand this fairly new chip....

Gullik

Re: AT32F403A anyone?

Posted: Thu Sep 08, 2022 8:45 am
by gc01
You could make a rough estimate of the CPU clock speed by measuring the current consumption of the board with code running in a tight loop and no peripherals enabled. According to the Artery data sheet for the ATF403A series the chip current consumption varies from 3.58mA at 8MHz up to 41mA at 240Mhz. Make an allowance for the power LED current and this could estimate the CPU clock speed. I don't know if the AHB bus always runs at the CPU clock speed.

Re: AT32F403A anyone?

Posted: Fri Sep 09, 2022 1:46 pm
by webjorn
There is an AHB divider that allows you to run at PLLclock, /2, /4,/8,/16,/64,/128,/256 or /512 (but no /32 )

Gullik

Re: AT32F403A anyone?

Posted: Sat Sep 10, 2022 7:46 pm
by webjorn
Default setup in Arduino when selecting 60 as pll mult factor

PLL Multiplier = 59 (59+1=60, 60 * 4 Mhz) 240 Mhz
AHB divider = 0 (240 Mhz)
APB1 divider = 8 (120 Mhz)
APB2 divider = 8 (120 Mhz)

Re: AT32F403A anyone?

Posted: Sun Sep 11, 2022 3:24 pm
by webjorn
This is extremely confusing.

The sample time is *very* close to 30 nS. This would imply a clock of 33 Mhz. I cannot derive such a clock from 240 Mhz, since that
would imply a noninteger division.(7.2) There is no jitter to be seen on the output waveform, it is a continous sequence of 0 and 1 at 30 nS each.
That rules out cycle slips between cpu and IO.

How do I run a timer at cpu cycle time? I would want to verify actual CPU frequency, (though I really do not doubt it, just to make sure)

To me it looks like I could program the timer division, just enable the timer and then read the counter register. If I do this at two instants,
I should be able to determine CPU vs GPIO timing. I have very little experience with AT32 / STM32 timers.

I cannot find any clock count register. Some CPUS have one, which is useful for debug, i.e. just get a snap of cpu time, another and then compare
or calculate the diff.

Gullik

Re: AT32F403A anyone?

Posted: Mon Sep 12, 2022 9:42 am
by webjorn
Getting somewhere.....but still puzzled

Modified code, sending 4 samples "unrolled" indicates there are transitions lasting approx. 16 nS. This is a multiple of 4.17 nS, i.e.
4 cycles to emit one word. So the instruction generated takes 16.66 nS. Thus it should be possible to generate data at
60 Msamples / second, OR if input works the same catch data at 60 Msamples / second



for(k=0;k<maxdata;k=k+4) {
// datarray[k] = (*(uint16_t *) 0x40010c08);
(*(uint16_t *) 0x40010c0c ) = datarray[k];
(*(uint16_t *) 0x40010c0c ) = datarray[k+1];
(*(uint16_t *) 0x40010c0c ) = datarray[k+2];
(*(uint16_t *) 0x40010c0c ) = datarray[k+3];

}

Gullik

Re: AT32F403A anyone?

Posted: Mon Sep 12, 2022 2:27 pm
by gc01
Timers 6 and 7 have a current value register (see TMRx_CVAL). It looks like the maximum rate they can count is 120Mhz (figure 4-1 in the data sheet says 240Mhz but this looks like an error). You could count how many times they wrap around in a second to verify their count frequency after configuring one or the other and use the value read from the TMRx_CVAL register to measure the elapsed time of pieces of code.

Re: AT32F403A anyone?

Posted: Mon Sep 12, 2022 9:50 pm
by ozcar
Does this processor really not have a cycle counter?

The manual I turned up, https://www.arterytek.com/download/RM_A ... .02_EN.pdf, mentions DWT in several places, and I would have thought DWT would include DWT_CYCCNT.

But then, that manual I found mentions CPU operating up to 200MHz, not 240MHz, so maybe I'm looking at the wrong thing altogether.

I was also wondering how a timer CVAL register would differ from a timer CNT register, but that manual has no mention of CVAL, so another sign that I'm looking in the wrong place.