Page 4 of 10
Re: dhrystone and whetstone benchmarks
Posted: Sun Jan 26, 2020 10:27 am
by Pito
I have got BlackF407 board with 407ZET (144pin) on it (plus 512kB 10ns sram soldered in).
I do upload via J-Link (clone) with J-flash utility (set to SWD @4MHz).
Then I have to unplug/plug the USB cable, the RST does not start the stuff after upload..
It seems USB code needs some fix.
Re: dhrystone and whetstone benchmarks
Posted: Sun Jan 26, 2020 10:33 am
by Bingo600
Black Ali F407

- F407VE-Black.png (57.37 KiB) Viewed 8426 times
Code: Select all
##########################################
Single Precision C Whetstone Benchmark
Calibrate
0.10 Seconds 1 Passes (x 100)
0.51 Seconds 5 Passes (x 100)
2.57 Seconds 25 Passes (x 100)
Use 97 passes (x 100)
Single Precision C/C++ Whetstone Benchmark
Loop content Result MFLOPS MOPS Seconds
N1 floating point -1.12475013732910156 81.327 0.023
N2 floating point -1.12274742126464844 57.431 0.227
N3 if then else 1.00000000000000000 167.325 0.060
N4 fixed point 12.00000000000000000 315.000 0.097
N5 sin,cos etc. 0.49909299612045288 1.292 6.246
N6 floating point 0.99999982118606567 59.255 0.883
N7 assignments 3.00000000000000000 71.990 0.249
N8 exp,sqrt etc. 0.75110614299774170 1.654 2.181
MWIPS 97.332 9.966
Re: dhrystone and whetstone benchmarks
Posted: Sun Jan 26, 2020 10:40 am
by Bingo600
Pito wrote: Sun Jan 26, 2020 10:27 am
I have got BlackF407 board with 407ZET (144pin) on it (plus 512kB 10ns sram soldered in).
I do upload via J-Link (clone) with J-flash utility (set to SWD @4MHz).
Then I have to unplug/plug the USB cable, the RST does not start the stuff after upload..
It seems USB code needs some fix.
I have Jlink's too
But mostly i use ST-Linkv2 or BMP , BMP is so easy (I'd expect even more on Win)
I made a BMP out of a BluePill here
https://www.eevblog.com/forum/microcont ... msg2823502
Binary
https://www.eevblog.com/forum/microcont ... msg2823454
BMP SWD pinout
https://www.eevblog.com/forum/microcont ... 7954;image
Try it out
Though i agree the J-link is nice ....
/Bingo
Re: dhrystone and whetstone benchmarks
Posted: Sun Jan 26, 2020 10:41 am
by Pito
When looking at the historical whetstone result data - the big CPUs get higher MWIPS, but much lower MFLOPs at the same clock.
Also I do not understand you got 100 MWIPS @96MHz (411) and @168MHz (407) we get 98.
There must be a subtle bug in the code somewhere.
The historical results show nice linear dependency MWIPS on clock.
I do assume we should see something like
150 MWIPS @168MHz (407).
I would suggest small changes in the code, wait..
In the original code it was double
Code: Select all
double theseSecs = 0.0;
double startSecs = 0.0;
double secs = 0.0;
Also you may use micros() to get better resolution
Code: Select all
void getSecs()
{
theseSecs = micros() / 1000000.0;
return;
}
I doubt it helps, however, you may try..
PS: is the ART enabled in the STM core ????
Re: dhrystone and whetstone benchmarks
Posted: Sun Jan 26, 2020 11:20 am
by fpiSTM
Re: dhrystone and whetstone benchmarks
Posted: Sun Jan 26, 2020 11:30 am
by Bingo600
@fpiSTM
My disco F407 is old --- Like bought within 1yr from 1'st release ... Prob no ART in that one.
Also makes the timings consistent w. My Disco & Pito's Black F407
Where do i find the PLL settings for the PILLF401 - I have no idea what speed my F411 (selected as F401) is running ??
/Bingo
One could use a few support routines ..
int Board_Init_Parms(int *HSx_Speed; int HSE_Enabled, int *PLL_Speed, int *ART_Enabled) or the likes ....
Maybe passing a struct would be better.
Interesting things could be :
What clocktype are we running : Direct , HSE , HSI
What is the PLL Speed in MHz (0) for No PLL
What ART level are we running ??
ABP1 / ABP2
Well give me all

- STM32-Clocks.png (76.51 KiB) Viewed 8410 times
/Bingo
/Bingo
Re: dhrystone and whetstone benchmarks
Posted: Sun Jan 26, 2020 11:59 am
by fpiSTM
All clock config are in the variant, in SystemClock_Config.
Re: dhrystone and whetstone benchmarks
Posted: Sun Jan 26, 2020 12:03 pm
by Bingo600
Seems like the PILLF401 runs 84MHz
WUTTT ... I Can't upload a 98KB image
Is there a limit of 100K on pics ??
That must be raised a bit ...
Code
https://github.com/stm32duino/Arduino_C ... ariant.cpp
Clk84

- PILLF4xx-84MHz.png (64.79 KiB) Viewed 8408 times
Clk96

- PILLF4xx-96MHz.png (65.53 KiB) Viewed 8408 times
Can the F4 run w. 2 Flash waitstates @96MHz (I'm lazy)
/Bingo
Re: dhrystone and whetstone benchmarks
Posted: Sun Jan 26, 2020 12:11 pm
by Pito
All F4xx ever have got the ART.
It has to be enabled, then it does not matter how many ws you have (the ART accelerate the flash access).
You may overclock to 2ws @96MHz, it may or may not work.
Re: dhrystone and whetstone benchmarks
Posted: Sun Jan 26, 2020 12:16 pm
by Bingo600
Pito wrote: Sun Jan 26, 2020 12:11 pm
All F4xx ever have got the ART.
It has to be enabled, then it does not matter how many ws you have (the ART accelerate the flash access).
You may overclock to 2ws @96MHz, it may or may not work.
Seems like OLD F4's doesn't , hence the check
https://github.com/stm32duino/Arduino_C ... #L188-L193
/Bingo