would it be of use if I generated some missing "default linker script"'s

[Alextrical]

Yes all, Exceptions are, of course, those not supporting USB.

Perfect, I was hoping that would be the only exception

Most of the time, CPU clock (or core clock) is the same than HCLK, but there are exceptions

The point is to have the max frequency on core(s), and buses (AHBx, APBx).

Thank you for clarifying, I haven't seen more than a couple of exceptions as of yet.

I can't see the picture (I requested access)

Sorry, that should now be fixed, seems that I missed an option in Google Drive

with cubeMX you generate the code of the project, within the generated project look for function void SystemClock_Config(void)

I've managed to locate it in a subfolder under 'Core'

Hopping there is not too much of those, I think it should be handled manually.

the following exceptions I have found so far

Code: Select all

STM32F205RBTX_FLASH.ld
STM32F205VBTX_FLASH.ld
STM32F205ZCTX_FLASH.ld
STM32F207ICHX_FLASH.ld
STM32F207VCTX_FLASH.ld
STM32F303C6TX_FLASH.ld
STM32F303R6TX_FLASH.ld
STM32F303VBTX_FLASH.ld
STM32F303ZDTX_FLASH.ld
STM32F328C8TX_FLASH.ld
STM32F334C4TX_FLASH.ld
STM32F334R6TX_FLASH.ld
STM32F358CCTX_FLASH.ld
STM32F358RCTX_FLASH.ld
STM32F358VCTX_FLASH.ld
STM32F398VETX_FLASH.ld
STM32F405OEYX_FLASH.ld
STM32F405ZGTX_FLASH.ld
STM32F407IEHX_FLASH.ld
STM32U575AGIX_FLASH.ld
STM32U575CGTX_FLASH.ld
STM32U575OGYXQ_FLASH.ld
STM32U575QGIX_FLASH.ld
STM32U575RGTX_FLASH.ld
STM32U575VGTX_FLASH.ld
STM32U575ZGTX_FLASH.ld
STM32U585AIIX_FLASH.ld
STM32U585CITX_FLASH.ld
STM32U585OIYXQ_FLASH.ld
STM32U585QIIX_FLASH.ld
STM32U585RITX_FLASH.ld
STM32U585VITXQ_FLASH.ld
STM32U585ZITX_FLASH.ld
STM32U595ZJTXQ_FLASH.ld
STM32U599BJYXQ_FLASH.ld
STM32U599NIHXQ_FLASH.ld
STM32U5A5ZJTXQ_FLASH.ld
STM32U5A9BJYXQ_FLASH.ld
STM32U5A9NJHXQ_FLASH.ld
STM32WB10CCUX_FLASH.ld
STM32WB15CCUX_FLASH.ld
STM32WB1MMCHX_FLASH.ld
STM32WB30CEUXA_FLASH.ld
STM32WB35CCUXA_FLASH.ld
STM32WB50CGUX_FLASH.ld
STM32WB55VCQX_FLASH.ld
STM32WL54JCIX_FLASH.ld

One last advice, because we consider Generic boards, we cannot rely on external hardware,
so use of LSE/HSE is forbidden and replaced by internal oscillators LSI/MSI/HSI.

That's fair enough, I have been working under that assumption from the guide, as the only oscillator you can count on is the one built into the MCU

[Alextrical]

Oh, what do you want me to do with the MCU's that have USB, but cant resolve a clock speed once its enabled

Code: Select all

STM32F102C
STM32F102R
STM32F103R
STM32F105R
STM32F105V
STM32F107R
STM32F107V
STM32F302C
STM32F302K
STM32F302R
STM32F302V
STM32F302Z
STM32F303C
STM32F303R
STM32F303V
STM32F303Z
STM32F373C
STM32F373R
STM32F373V
STM32F405O
STM32F405Z
STM32F407I
STM32F411V
STM32F412V

[ag123]

just 2 cents, i think "generic" variants runs on HSI (internal RC osc). Hence, in principle, no usb even if the chip supports it.

its SystemClock_Config() may look like such:
https://github.com/stm32duino/wiki/wiki ... figuration

Code: Select all

WEAK void SystemClock_Config(void)
{
  /* SystemClock_Config can be generated by STM32CubeMX */
#warning "SystemClock_Config() is empty. Default clock at reset is used."
}

Normally, for "real" boards, they run on an external crystal - i.e. HSE
then it'd need to have its own valid SystemClock_Config(void);
and that it'd need to setup the clocks and peripherals (including USB) so that it'd work.
For USB to work, USB needs to be clocked at 48 MHz, i think.
So the PLL multipliers and dividers needs to be set appropriately with a HSE.

i made some python scripts to do that
viewtopic.php?f=41&t=78
and it is for "real" boards, i.e. those that runs on an external crystal i.e. HSE

[Alextrical]

I've created the src/main.c files for all of the MCU's linker scripts that where published to my GitGub. I'm aiming to format them all to the convention as per the documentation, and then start looking into matching them up to the folders from the STM32Duino project folders that are missing them. Being aware that only one Generic Clock and LD file is required per folder.

I don't know if I will have the time to transpose all of these MCU's to the required formatting, but I will make as many files available as possible, on the off chance anyone wants to make use of the files manually generated through STM32CubeMX.
I'm only really here to get the generic GOB1CBTx supported for the PolyFormer Project, but wanted to try and help out while I was at it

[ABOSTM]

@Alextrical,
Thanks for your efforts
It seems that effectively it fails to solve clock speed because it request an HSE when USB is enable, like @ag123 said.
So in that case don't enable USB.

@ag123,
Even if it is right that some MCU will need External HSE to run USB, I would not take that as a mandatory rule:
for example STM32H474 have an internal HSI48, which is usable for USB, no need of a HSE.

[ag123]

i think it is more of a 'simplifying assumption', as otherwise it would take much more effort coding up the core given the large STM32 portfolio.
The idea is that 'generic' variants, doesn't set up the clocks as practically there is no HSE, or that the external crystal frequency is unknown.
I'd guess as things are worked along, those stm32 that has a HSI48 could be subsequently enhanced to have a real SystemClock_Config() that actually runs the USB. Or we'd leave it as an 'example' so that those who needs it could make a real SystemClock_Config() that setup HSI48

stm32 h7xx series has a pretty elaborate clock system, I've got a h743 board where I can't get the SPI to work with a particular LCD, my guess is some things to do with the peripheral clocks, but I kept procrastinating on fixing it

[jordan]

I am trying to add a new generic variant for a STM32L431CCU6 board I have, and struggling with the wiki in a few places (I assuming just because I've never done this before!) this thread had some useful info that got me closer, but not quite there.

For simplicity, in stm32duino, we generally do like this:
* when several RAM are adjacent, then we declare only one with the whole size. (size is declared in boards.txt)
* when several RAM are not adjacent, only one is declared (the biggest one)

The generated linker script I have has RAM and RAM2 (and FLASH), and the datasheet for the STM32L431xx says 48K is mapped at 0x20000000 and 16K at 0x10000000 but 'also at 0x2000C000, offering a contiguous address space'. I assume this means I can declare only one RAM in the linker script and all 64K can be declared in boards.txt?

Also, the wiki says set PLL Source Mux to HSI, and try to set the CPU clock and HCLK to max frequencies. Should I be adjusting the MSI RC, or System Clock Mux to try and achieve the highest SYSCLK and HCLK? Or is there a specific System Clock Mux I should be selecting, and then whatever the highest SYSCLK and HCLK within that?